Asvoria Kuan Soo Huey

Maintain and developing test automation software in various platforms (LabView, Python, C#… etc) for directional drilling equipment.

Research and development of medical electronic & ultra high speed computing devices. Preparation of test protocols and verification of system architecture and system requirement specification.

Development and prototyping of various electronics products. Sky is the limits!

Development and prototyping of IOT product, bridging the analog world to digital computing. Implementing high precision, super speed analog-to-digital module. Negotiate with potential customers, vendors, and managing engineering, marketing and sales team. Response and bid on call-for-tender projects. Seeking and pitching for investors to help accelerate the completion of the project.

Covered various engineering topics such as Electronics Instrumentation, VLSI system Design, Digital Signal Processing, Signal and Systems, C/C++/C# Programming and Higher Engineering Mathematics. Successfully guided Diploma Students on their final year projects which encompass various engineering problems.

Successfully completed the designated CBB layout under a contract with our contract client: Intel Microelectronics. Helped the DDR/MIG MD team during the critical transition period from 14nm technology to 10nm technology. Design integrated circuit schematics (ADT DDR) to pass FEV (Formal Equivalence Verification) Tape-in schematics to layout. Design and floorplan digital and analogue layout using Genesys (CAD tool) to meet DRC (Design Rule Check), and RV (Reliability Verification) to tape-in for production.

Leads the R&D team to design new product from concept to micro-production of golden sample. The team had successfully improved the performance of HCFP’s core surge protection device and greatly reduce the production costs by re-design the PCB, components and careful selection of new components. She was part of the pioneer R&D team member who successfully set up a high voltage test lab for HCFP. She build up a 10kV 5kA surge generator to perform tests on new products.

Introduce product concept & solution. Design circuitry, simulation models, build schematics, footprints library, component placement, PCB layout routing, BOM, marketing prototype building, functional prototype building and testing, final production golden sample preparation.

• Design art stages which met DFM, going through TRLA (Technology Readiness Level Assessment) & MRLA (Manufacturing Readiness Level Assessment)
• Working together with procurement to source & negotiates for BOM purchases.
• Plan & perform tests for new products for IEC/UL/JIS standard tests.
• Documentation on product EC self certification.
• Working with marketing to perform public demonstration, expo, shows, & business partner presentation on new products.
• Roadmap & budget planning on new product design.
• Prior art search & evaluating product patentability. Document preparation & log booking for R&D process.
• Develop test methods/technique, integrate and validate test program for surge protection devices and varistor components.
• Customer’s site survey to collect realistic data, identify problems and propose new design improvement.
• Meeting with customer to analyze their needs & provide technical support to sales account manager for preparation of quotation for the customers.
• Responsible to set up high voltage test lab. Building of 10kV 5kA surge generator to perform tests on new products.

Successfully completed the designated fub layout for Westmere and Haswell projects on schedule. At the same time, she provided support for her colleagues on their fubs. During the 2nd year of her employment, she expanded her career by taking up schematic design for RF (Register Files) fubs.

Design integrated circuit schematics (Register Files) to pass FEV (Formal Equivalence Verification), converge timing, power, noise and quality requirements internally and externally to section.

Re-design and implement new schematic topology to meet timing and power requirement.

Tape-in schematics to layout. Design digital and analogue layout using Genesys (CAD tool) to meet DRC (Design Rule Check), and RV (Reliability Verification) to tape-in for production.

• 4 years Digital Integrated Circuit mask design experience.
• 1+ years Analogue Integrated Circuit mask design experience.
• 1+ years Digital Integrated Circuit design experience.

Chartered 28nm layout design to meet DRC & production rules. Digital core RF (Register Files) circuit design from RTL to schematics.